This weekend I added two additional pages to the phase lock loop, reverse engineered integrated circuit experiment, specifically two of the graphic files. I’m also continuing my efforts to correct many of the pages I had header issues with as denoted in a previous blog post. I also noticed (just now as I'm making this post) there is a slight paragraph formatting issue with the lower text on these pages, which I'll have to trace down... hmmm. Anyway, the new pages I just added are:
Phase Detector VCO Feedback Signal Graph
LM565 PLL Implemented using Discrete Devices
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